Coding Adventures

New Blog

2011-09-04T09:08:00.000-07:00

i have moved my blog to the following location: codingcipher.wordpress.com Please join me there for future blog posts!

SystemC

2011-08-29T07:11:00.000-07:00

IEEE1666, if you want to look at it up close and personal here. For those of us designing FPGAs, this could be a great tool for system design and modeling. i would call this language still in its infancy due to the overall adoption by the design market. i could only find one tool made by Cadence that claims to support the language for synthesizable constructs. SystemC is a superset of libraries

Activities

2011-08-09T06:48:00.000-07:00

i just looked at my blog and realized it's been, over a month and a half?!?! Wow, time flies. If you didn't know, i had a little boy on June 23 and have been busy ever since. Duh, right? i have been focusing on learning JavaScript to add some "playground" stuff to my pet website here. i thought it'd be fun to add a client-side syntax highlighter for the RTL/TB code pages. i've also been

FPGA Development Environment

2011-06-16T16:55:00.000-07:00

Many of you know that i run most of my FPGA development on my Mac. i have compiled tools and utilized the tool base from MacPorts for almost all of the utilities i require for my work. However there are some tools that i cannot run on Mac, so my alternative is to just run a virtual machine of my favorite Linux OS. Well, i originally started my Linux journey with Ubuntu and it is a very friendly

VHDL and some Quirks with GHDL

2011-06-03T12:41:00.000-07:00

Those of you familiar with VHDL FPGA design are probably aware of the Open Source tool GHDL. It is quite robust and the author, Tristan has done a *great* job with many of the features it has. i just thought i'd catalog a few quirky aspects of the tool that i have noticed while using it. Call it some "gotchas" that i have fallen into. You have to give me some slack, i learned HDL coding from

What is going on?

2011-05-23T21:10:00.000-07:00

Been a while, been busy with work and more work. i took a contracting job on the side working a small CPLD redesign. Can't share specifics of course :) Anyway, what has been going on? Well, i recently upgraded my professional website server to use the latest Linux 2.6.39 kernel and i have to say i think i can see response time improvements even in the page loading. See for yourself. ------ EDIT

Mac OSX Time Machine drives on FreeNAS Server, Part 3

2011-05-11T09:44:00.000-07:00

This post is a continuation from Part 1 and Part 2 where i demonstrate how to setup the hardware and setup FreeNAS for hosting a Time Machine drive over the network. Now we will finally setup the Mac to connect automagically to the FreeNAS server. The way this setup works, is every time the Mac is on the same network as the FreeNAS server with the Time Machine share, Time Machine will perform

Mac OSX Time Machine drives on FreeNAS Server, Part 2

2011-05-05T17:27:00.000-07:00

This post is a continuation from Part 1 where i demonstrate how to create a NAS based Time Machine backup drive for autonomous backups. FreeNAS can be downloaded from this page, grab the iso file that is for your system. Installing FreeNAS isn't hard, there are two primary steps: Installing from CD/DVD/USB Setting up the Network interface i found a good resource to be here, just keep in mind

Mac OSX Time Machine drives on FreeNAS Server, Part 1

2011-05-04T20:59:00.000-07:00

This is just a background of my experience, skip to Part 2 if you have FreeNAS already setup somewhere. Here's my dilemma: i have two Mac Book Pro laptops, each with a separate external 200GB hard drive for backups through the Apple Time Machine application. If you haven't used this software and don't know what it's about, check this page out. i will give Apple props for this application,

Source Code Posting, Professional Site

2011-05-02T08:47:00.000-07:00

Some of you may have visited my "pet" website that i have been developing over the past several months. i wanted it to encompass my entire professional experience as well as some of my professional perspective. This would leave this blog free to specifically be used for documenting my projects, which was it's original purpose. i have hinted at in previous posts that as i develop several of these

KPIT GNU Tools and Mac OSX, revisited

2011-04-27T09:11:00.000-07:00

In many previous posts, i was bringing myself up on a (fairly) massive learning curve about cross-compiling a gcc compiler with a KPIT GNU config flavor for the RX62N microcontroller from Renesas. My experience with compiling the KPIT GNU tool chain went well as seen in Part 2 of that chain of posts. However, the problem i had is that Apple uses some weird USB endpoint controlling in the OS, so,

Some Comments on 3DES and AES

2011-04-23T18:49:00.000-07:00

Many of you know i am now currently working on implementing a 3DES core in HDL. i have studied the algorithm quite deeply at this point (still have a few things to cover) and have noticed several major differences between the DES and AES algorithms. First, AES has several operations that involve matrix-mathematical operations modulo to a set field size. This drastically adds to the complexity of

3DES Core

2011-04-18T13:46:00.000-07:00

Since i didn't have ANYTHING to do, i decided to start writing a 3DES Crypto core. i know, i know its an old algorithm and why would i care about it? Well, because: i'm a geek. i love crypto in any form. i've already written an AES Core. So, the last question is "why not?" If you answered, "might as well" you had the same answer that i did. i don't have much to show for it right now, since i have

Soft Core ALU, SUB Instruction

2011-04-10T18:18:00.000-07:00

Bang! Subtraction was a lot easier than i was originally thinking. i didn't remember this from my boolean algebra but basically we can use an adder, any kind of adder as a subtractor by remembering some simple math concepts. First, subtraction is relational, meaning that: A - B != B - A Remember these proofs? Therefore subtraction must maintain a relation of the numbers that are being operated

Soft Core ALU, CLA Instruction

2011-04-07T20:12:00.000-07:00

Ok, i finally had time to button up the CLA adder i have been working on for my ALU soft core project. i have been developing a 256bit adder, but a lot of the time spent had to do with the involved test bench and compile structure that i have been working on. i developed a test bench that will test the four different layers of the CLA individually, all the while providing two different "types"

Central Website

2011-03-27T18:43:00.000-07:00

Several months ago i mentioned that i had tried to use Google Sites to host my central website, except hat i ran into problems with hosting NaturalDocs pages on Google Docs. The issue i was having was that Google Sites doesn't allow uploading of HTML pages, which is not really a customizable website then. So i have officially released a beta of my Professional website here which will act as my

Memory Board Update, Layout Pt. 2

2011-03-21T06:46:00.000-07:00

i know, it's been a while. Sometimes the late night/ weekend warriors need breaks too ;) This last week i worked on getting down heavily into my layout. i dropped the circuits down for the power planes and started into the control signals', signal integrity components. Opps, they're on the wrong side, oh well a minor tear up and flip. Check it out.I am somewhat at a burn out phase right now,

Memory Board Update, Beginning of Layout

2011-03-09T17:55:00.000-08:00

i have finally removed my attention from PCI, PIC32 and My Professional Portfolio website development, to begin the layout of my Memory Board. Remember that project? Well, i just dumped everything to PCBnew in KiCAD and started organizing the components. There are 280 capacitors on this board, to give you an idea of how massive an undertaking it is. One thing i found: another bug with KiCAD! If

Arduino, Bootloaders and Basics....

2011-03-08T09:11:00.000-08:00

This another one of those very subjective posts (there's a lot of those lately, WTF?!?). First and foremost, i love those Arduino guys and the other "band of brothers" that interface with them over at Sparkfun. What is Arduino? Well, from my perspective, it is a bootloader that allows the designer to write light-weight C code that targets several Atmel microcontrollers. It's great what those

Verilog Synthesis and Test Benching

2011-03-02T08:30:00.000-08:00

This post is purely subjective, however i will try to convince you i am right. i just ran across this block of HDL in a Verilog RTL Module: if((access_q == 0) && (access == 1) && (write == 1) && (addr == 'hac)) en <= data[0]; else en <= 'hx; Wait, what?!? "x" is NOT a synthesizable assignment! Most high-end synthesizers like SynplifyPro will catch this and probably replace it with a "0"

Memory Board, Hirose FX2 PCB Footprint

2011-02-21T19:39:00.000-08:00

This was probably the largest task in one component thus far in this design: creating the PCB footprint for the Hirose FX2-100S connector. One good thing is that the pins are laid out on a fairly easy grid (0.1" x 0.075"). So without further a du, here's a shot of the footprint i created. i have uploaded the KiCAD PCB library that i have created thus far and it includes the FX2-100S footprint.

Amazon's Kindle DX Graphite: A Review

2011-02-18T11:52:00.000-08:00

i posted a while ago about the Barnes and Noble NOOK ereader. Review Well, now i have sold my NOOK and (in the same day) purchased the latest Kindle DX Graphite and it is *awesome*. i originally wanted an ereader for datasheets as well as light book reading and the NOOK's screen size was very limiting. If you like to just read books and don't use it for anything else, the Kindle 3 or the NOOK

iptables and Advanced Package Tool Updates

2011-02-17T07:34:00.000-08:00

i am running a small Ubuntu Server that i tinker with Web Serving and SSH and all that kind of stuff. i noticed that when i would attempt to update the server via a $ sudo apt-get update The process would hang for about two minutes when the package tool was "Fetching Headers" from a repository. This would occur at random points in the update process. i also run a firewall on the server with

More Play with the PIC32

2011-02-14T07:41:00.000-08:00

Since this weekend was crazy busy, i only had a few short hours to play around with MPLABX and the PIC32 after getting the environment running last week. What better way to get a nice little sample program up and running than doing something with PWM and the on-board LEDs. Bingo! Here's a short program that fades out, then back on the RED LED, then the YELLOW, then the GREEN and then starts

FPGA Designs of Complex Systems

2011-02-09T14:51:00.000-08:00

This post is purely subjective. Most FPGA designers are faced with moderate to extremely complex design problems that require extremely elaborate solutions. However, those of us with at least a little design experience often find ourselves with a partially completed base of HDL that has become an almost unmanageable maze of nets and signals. What are some of the ways to avoid these design

NoteSlate

2011-02-07T14:12:00.000-08:00

This product is something i have been waiting for since the first Kindle came out: an all digital, sole-purpose, note taking tablet. Well, here it is. The yet-to-be-released NoteSlate. Where have you been all my life? This is the kind of device that will finally destroy the paper market. If user's have ways to read digital books and can now take digital notes by WRITING not TYPING then the

PIC32 Development on Mac OSX

2011-02-06T08:21:00.000-08:00

If you don't know by now, i am developing everything on Mac OSX. Therefore, if a microcontroller, microcprocessor or FPGA company doesn't support all three major OSes, i am not developing with their product. Well, good job, Microchip. They have successfully developed the embedded IDE of MPLABX. Downloadable is the IDE and MPLAB C32 compiler. However, if you prefer to use gcc that would work as

KPIT GNU Tools and Mac OSX, Part 4

2011-02-03T08:56:00.000-08:00

i have been working an open source tool created by DJ Delorie. It is a flash tool that uses the target USB port on the RX62N RDK Board after the RX is setup with the two dip switches SW5 and SW6. The code can be downloaded from DJ's site here. (This is a download link) If you'd like to look at DJ's site explaining some of the tools, check it out here. Yes this FLASH tool is based on the RX Stick

Watching a Honeypot

2011-01-31T12:45:00.000-08:00

If you aren't into network and computer security you will probably have no idea what a honeypot is. It is a designated computer that intentionally has security holes in it's armor, and is logically located in the DMZ of a network. This provides potential hackers a place to attack that "distracts" them from the actual servers one is trying to protect. See this nice little Wikipedia article for

Reconstruction....

2011-01-27T08:59:00.000-08:00

You may have noticed that yesterday, i deleted a LOT of content from my blog. Well, the reason for this is that i had realized that much of that info should be placed on a website. i had tried to develop a "dual-layer" web environment for myself that describes my professional being about a year ago. However, i never really made a decent division between blog material and website material. Well,

Distributions of Linux, A Timeline

2011-01-26T07:39:00.000-08:00

i found this interesting graph of the distributions of Linux and their respective parent forks, traced all the way back to the original Kernel. Very cool, enjoy!

Droid X Rooted, What Apps to Remove?

2011-01-21T11:06:00.000-08:00

i guess this is purely subjective. For me i had a huge list, for you it may not be any. Either way, let's start from the beginning. i first rooted back when Android 2.2 came out because Motorola put the Navigator app on my X and it kept using about 20MB of RAM (what the heck is it doing anyway?). This first root was somewhat sketchy. i followed a howto that involved using the Android IDE and

KPIT GNU Tools and Mac OSX, Part 3

2011-01-20T08:34:00.000-08:00

Please reference Part 2 of my experience with the KPIT GNU Tools. That post will explain how to compile and install the gcc cross compiler. In this post, i will explain how to compile and install gdb (GNU Debugger) and the run tool for the cross compiler toolchain. KPIT GNU packages these tools separate from the cross compiler. 1) Download the gdb package (latest, as of this writing it was

KPIT GNU Tools and Mac OSX, Part 2

2011-01-15T21:21:00.000-08:00

It. Finally. Compiled. Yes, it's true. The tool chain source available for downloading at KPIT GNU Tools, that can be used to cross compile code for the Renesas microcontrollers (as well as others) is usable on Mac OSX. i have officially ported it. i haven't tested if it actually cross compiles correctly, that will be coming in part 3 :). So, how did i accomplish this amazing feat of

Ever used conky?

2011-01-13T14:35:00.000-08:00

i hadn't ever used the package "conky" before, but i had seen it used. It's a small robust package that displays system stats (and can display a whole crap load of other stuff too) on one's desktop. No, it's not like those crappy Windows applications that still have windows and bars to them, this package actually integrates the system info into the desktop background. i will say this: to

Verilog Coding Style

2011-01-06T11:13:00.000-08:00

This is purely an opinion, but i will try and convince you that i am right. There are two primary styles of writing Verilog HDL. One is the monolithic style where EVERYTHING is contained in an always block that is sensitive only to the clock and possibly the reset if it is an asynchronous reset. The second method is what i like to call the register-combinatorial-segregated (RCS) style. This

SPICE Environment

2011-01-04T08:39:00.000-08:00

i needed my circuit simulation up and running, so i set out to revive my old friend ngspice. i have played with installing ngspice as well as a GUI Circuit Schematic Capture tool on my eeePC, way back in January 2009, but i never needed to use it so i never blogged about it. Well, tada, need it now, so i might as well post about it. To simulate one needs a few different types of tools:

Google Reader Desktop App for Linux?

2011-01-03T14:21:00.000-08:00

i was trying to find a Linux desktop app that syncs with Google Reader, with no luck. There is this application called "ReadAir" but it uses Adobe AIR and doesn't sync anything when i login to my Google account, and throws an error message in the GUI. Maybe it's the application, maybe it's Adobe AIR? Whatever the problem is, this seemed to be the only option. So, maybe i'll try and throw an app

KPIT GNU Tools and Mac OSX, Part 1

2010-12-28T20:29:00.000-08:00

This is the first post of several (i am sure) about my cross-compiler building experiences from the KPIT GNU Tool Suite. Many of you know that i run OSX for most of my development work and virtualize Linux as necessary (my Kernel development projects, software functionality testing etc etc). Since i entered the recent Renesas RX design contest, i need a compiler toolchain for the RX that would

Passwords and Security

2010-12-27T15:09:00.000-08:00

i recently read an article where the author was stating he was changing his methodology on how he treats his accounts and their passwords. He offered the concept that it is IMPOSSIBLE to maintain a mental list of passwords that are tied to the multitude of online accounts that an average human maintains throughout the day. Therefore he (and i) offer a new concept: segregate all of my accounts

A Review on the NOOK Color

2010-12-19T08:04:00.000-08:00

i went to Barnes and Noble a few days ago for some last-minute Christmas shopping and decided to play with the new NOOK Color. i wasn't sure from the specs if they had put a new eInk Color screen in it or if it was just an LCD. The NOOK Color uses an LCD. This in and of itself wasn't too much of a disappointment, but Barnes and Noble seems to be deviating from the "pure" eReader in utilization

Rooted Droid X Update to 2.3.340 (Android Froyo Update 2.2.1)

2010-12-13T10:48:00.000-08:00

i rooted my Droid X, so sue me. i hate all the bloatware that Motorola forces on the users and DOESN'T allow to uninstall. i am currently running rooted 2.2 (build 2.3.15) and am updating to Froyo 2.2.1 (build 2.3.340). i read an article here that states if the bloatware has been modified i cannot update (?) with the "official" Froyo 2.2.1. i am downloading now and will post an edit after i see

Delay of Projects

2010-12-13T08:08:00.000-08:00

As most of you know, i am working towards two major projects right now. 1) Custom Memory PCB for use with my Soft Core design concept. 2) The Renesas RX Design Contest. i had to move over the last week due to some previous issues, however i am planning to work on getting the IDE up and running for this awesome board i received from Renesas. i am using OSX, which means i *should* be able to use

Everyone Stand Back....

2010-12-01T07:46:00.000-08:00

This is dedicated to Randall and the rough time he and his family are going through right now. i love this and always get a kick out of how the artist describes himself: "I concoct elaborate fantasy scenarios where it lets me save the day". i couldn't agree more. i think i have an intimate connection with this strip as i realized how powerful Regular Expressions are, that infamous day that Perl

Renesas RX Design Contest

2010-11-30T14:22:00.000-08:00

And you thought i had enough to do at my new job and with my memory board/asm project? PSCHAH! i saw this contest come across my Twitter feed and i realized it had been almost two years since i last entered a design contest. The previous was for the PIC32 when it first came out. Great chip. Anyway, this is for the new Renesas 32bit microcontroller. Here's some specs, but you should look at the

More KiCAD Bugs, EESchema Hierarchical Labels

2010-11-29T21:07:00.000-08:00

i was getting errors on my MUX blocks that several of the output lines were also connected to output lines. Weird, that was my first response. i thought maybe that the hierarchical label was affecting the output port from the 74138. However changing those labels to bidirectional didn't affect anything. After several hours of debug, i found an interesting fact: Net Labels and Hierarchical Labels

More KiCAD Bugs, EESchema ERC

2010-11-29T08:10:00.000-08:00

Please know, i extremely LOVE KiCAD! i think it is a great project worth the highest regard. But as with ANY open source project, it is (normally) extremely stable and (normally) somewhat buggy. Another glitch i found that those who use KiCAD often have as well run across is what i'd call the "shared junction" issue. If one places a component and has a net passing "through" that node, meaning

KiCAD: Changing Global Text and Label Sizes

2010-11-27T09:45:00.000-08:00

i am still working this memory schematic. i decided it would be beneficial to DEMUX the control lines so i could add more memory chips to my board. This will be saved for another post. Since i am using hierarchical sheets in my schematic, it makes it (hopefully) easier to just copy a block and paste it in the upper level schematic thereby duplicating my memory circuitry. Only problem: KiCAD has

Memory Board Schematic

2010-11-11T14:23:00.000-08:00

Finally, seems like i have been working this, well, since last May. i kind of have...oh well. Anyway, the problem and major hang up i had was that KiCAD doesn't allow busses to pass between hierarchical layers (strange), i moved, i moved AGAIN (long story) and i moved to a new engineering position with another company. i got in last night and decided if i am to ever get to the fun part of

Xilinx ISE UCF Files and VIM

2010-10-27T15:06:00.000-07:00

i hate GUIs, some are good, but most always break. And when it comes to writing code and compiling (or synthesizing) it, it's not a great idea to trust a GUI to do it right. Therefore, on all of my projects, no matter the language i develop my code in VIM and run it through tools from a terminal. This requires that VIM support all of my code files, even those language "types" that are internal

Memory Board Update

2010-10-07T19:32:00.001-07:00

So I have been working this memory daughter board for several weeks now. Only heavily in the last week though. I found that, especially with DRAM chips, IO gets used up RAPIDLY. The Nexys2 board only has 42 total IO that goes out to the Hirose FX2 connector. Well my design thus far, constrained by the FX2 IO, is four SRAM (128kb x 8) and a single DRAM (4096 x 1024 x 8-bits) memory chip.

Google Sites, Hosting Pages and Apache 2

2010-09-12T16:35:00.000-07:00

I started off a few weeks ago with a tip from a (now former) coworker that i should be diligent to document my Code with NaturalDocs. The reason is that NaturalDocs is a code documentation tool that creates nice clean webpage output from a code file that is nice a readable by a user. It doesn't however reveal the ACTUAL code itself, so it makes it a nice way to share code without actually

Some Thoughts on PCB Design/Layout

2010-08-20T16:50:00.001-07:00

I have threatened this since the beginning of the summer and now I think I'll actually be serious about it: laying out a custom board that has the latest Xilinx Spartan 6 FPGA on it and a nice SDRAM and DDR RAM slots/ports on it.Why would I do this, you may ask? Quite simple: the board layout experience is good and the future FPGA RAM core controller design is a very nice skill to have.So, I will

Custom Ubuntu LiveCD

2010-08-14T11:59:00.000-07:00

Apparently this OpenSource Linux-based EE Tool set is becoming "mainstream" for the EET department at my old college. i had one of the current students there ask me if i could give him some information on the tools i had used for my Senior Design. So we met up and i gave him, what surmounted to be a full blown "lecture" on the multiple different tools i had used as well as the learning curve i

KiCAD on Mac OSX

2010-07-08T08:20:00.000-07:00

If you are like me, you avoid MS like the plague. That being said, any Open Source application has a somewhat 'supernatural' appeal to it. Those of us that understand the concept of Open Source connect with the world of GNU (and other similar) in a way that is almost telepathic. Anyway, i have run KiCAD on my Ubuntu box for several months now and wanted to port it to my Mac. So i went looking.

Security Issues and Linux...

2010-06-15T12:10:00.000-07:00

i just read an interesting article on OSNews that is found here. Basically an application package on a distributors webpage (UnrealIRCd) had been compromised and replaced with a duplicate package that has/had a Trojan. To quote UnrealIRCd forums directly, "This backdoor allows a person to execute ANY command with the privileges of the user running the ircd. The backdoor can be executed regardless

Objective C Object Creation, Method Invocation

2010-06-10T13:57:00.001-07:00

As you might be able to tell, i am serious about what i said in my last post: i am reading HEAVILY into Objective C right now! i learned an interesting concept about Objective C, which is MOST likely possible with other OO languages: Object Creation through Method Invocation on another Object. What happens: an object is created and RETURNED after a method is called on another object, so that

Learning Objective C ::: Advancing Objects

2010-06-10T08:46:00.001-07:00

So i have been spending the last few weeks, well, golfing to be perfectly honest. Therefore i have decided in the last few days it is time to start studying Objective C more. i am reading from my Safari Books Online bookshelf, utilizing the digital format to refrain from having to purchase another book to carry around.i have learned that Objective C has stream lined some of the functions of

Test Post -- Client Blogger App (LumberJack)

2010-05-21T15:33:00.001-07:00

i have been thinking for a while about wanting a Desktop Client for Blogger, then i don't have to load up a browser and navigate to my site, go through all the steps to finally start blogging.So i went searching for a client.i first found this project but after reading the details, it was a student project (not necessarily a bad thing) that hadn't been touched since 2007 (very bad thing).So i

Other Languages... Jazz VIM Highlighter

2010-05-13T07:12:00.000-07:00

i was approached about doing some other test scripting work. However the language that this group is using is called "Jazz" where it's homepage for the development team can be found here. The language looks promising! It's a "high-level programming language for expressing, in a concise and accurate way, large digital synchronous circuits. From a language-designer perspective, Jazz is a

180 Spin and more code

2010-04-22T12:04:00.001-07:00

Yes, i know my last post was on VHDL as i was beginning to read up on that HDL language. However, since i have spent the last umpteen hours developing with Verilog, i figured i would take a break from the FPGA space and begin developing something new.The concept of the smart phone has always intrigued me but i didn't want to play around with it until after i finished my Senior Project. Well, now

Notes on VHDL vs. Verilog

2010-04-08T12:20:00.000-07:00

It's only been about a week since i started reading Designer's Guide to VHDL and already i can see how much "tighter" of a language VHDL is than Verilog. While Verilog can alternate between RTL and gate-level modelling, VHDL uses specific "blocks" to designate structural vs. behavioral modelling. In many ways VHDL is similar to C in that the modules (called "entities" in VHDL) use a

Next Up: VHDL

2010-03-30T10:05:00.000-07:00

So, after completing the final code of my Senior Project, i think it is about time i go "bi-lingual". i am now taking on the vast area of VHDL, with a HUGE reference/ learning textbook called The Designer's Guide to VHDL. This should satisfy my "light reading" thirst for the next few weeks.Over the summer i plan on developing some prototype boards to advance my skills with FPGA-based memory (

TCP Layer Synthesis

2010-03-27T13:06:00.001-07:00

Well, after several coding setbacks i successfully synthesized/PARed/Generated a bit file for the project after adding the TCP header.There are two remaining bugs that need to be squashed: the TCP Checksum is not calculating correctly (strange since i simulated the core and it was calculating properly) and the GO signal is "sending" the packets more than once a second (about 200 times per second)

Construction and Simulation of TCP Header and Checksum

2010-03-22T16:05:00.000-07:00

Over the last two weeks i began developing the TCP CRC algorithm for my project. This involved researching what data fields are used in calculating the CRC Checksum field of the TCP Header. Please see the post here for more information.After properly sequencing the Pseudo Header, TCP Header and TCP Data Payload into the CalcCRC module, and then throwing the "STOP" bit to that module, the TCP CRC

Simulation of IP Header

2010-03-15T07:41:00.000-07:00

Yes, this is the SECOND simulation of the IP Header core. The first simulation consisted of every field being completely static, thus after the first packet Wireshark would begin to label all following packets as "retransmit" packets.The reason for this digs slightly into the sequencing framework of IP. While IP doesn't have any handshaking, packets still need to have numbering to them in order

TCP Checksum

2010-03-11T08:41:00.001-08:00

i recently posted about the TCP and IP Checksum fields, however the TCP Checksum is looking a little more complicated than the IP checksum was.First off, i must stress the functionality differences between TCP and IP. While IP is used to create (in essence) the foundation for a packetized-network, TCP is a link-oriented layer in the TCP/IP stack. Meaning that TCP controls the handshaking and is

Header CRC Core

2010-03-04T21:23:00.001-08:00

As many of you know, i decided to take my packet header creation "to the next level." i convinced myself that it would be cool to create a CRC calculation core rather than calculating the CRC of both the IP and TCP headers by hand and making them static.This would not only add a level of dynamics to the TCP/IP stack but would also give me another cool core to work on.The CRC calculation requires

Senior Project: AES Core

2010-03-02T10:01:00.000-08:00

This last week was consisted of a LOT of work. i bit the bullet and finished the encryption core which required the complete development of a RoundKey module, which performs four 32-bit key lookups for every iteration during the encryption cycle.This module also had to keep track of the length of the key to determine when it was done looking up keys.i also had to develop an upper layer module

Heartbeat LED Indicator

2010-02-19T09:28:00.001-08:00

i know this is basically trivial, but it's also a good technique that i was taught by one of my teachers. If there is room in a design, use an LED as a "heartbeat" indicator which USES the same clock as the rest of the design. Also make it have enough logic in it that the operator can know if the the FPGA loaded properly from the EEPROM chip. This will prevent many hours of staring at code and

TCP and IP Header Checksum

2010-02-16T14:15:00.000-08:00

Ok, so most of you know that i finished my IP layer for the TCP/IP stack i am implementing in my Senior Design. Well, two fields were incorrect with known errors: the first is the LENGTH field and the second was the CHECKSUM field. So, basically if i tried to Route these packets, any self-respecting router would drop my packets before you could say "EFF!".i have been staring at Wikipedia.org and

Senior Project: AES Core: Key Expansion Pt1

2010-02-14T14:05:00.000-08:00

Wow, there was a lot of coding, recoding and recoding again for the heck of it this week. i wrote up a lot of documentation and block diagrams for the structure of my HDL to keep my mind from exploding (good thing).After completing the IP header last weekend, i decided to actually work on the AES Crypto core. As some of you may already know, i completed the Key Expansion algorithm last August and

Senior Design : Ethernet Communications Pt2

2010-02-06T14:25:00.000-08:00

i picked up my almost-functioning Ethernet Initialization and test data transmission modules and started digging. i was looking for the reason why the Ethernet header was mis-configured.i found in my HDL the block of code that sends the configuration 9-bits to the SPI module, and realized that for the first byte, my HDL looked like:always@(posedge clk or posedge reset)begin if(reset)

Senior Project: Ethernet Communications Pt1

2010-02-03T07:55:00.000-08:00

After a week and a half, hashing out the proper initialization sequence for the ENC28J60 over SPI, i began to worry that my chip was dead. The reason: the link light on the Ethernet Jack on the Hub was not turning on.....not good.i looked at several resources trying to find a topic on WHY the link light comes on when a device is plugged into the Ethernet Bus. Needless to say, i didn't find

Senior Project: SPI Debug Pt1

2010-01-31T15:48:00.000-08:00

i started yesterday working with the SPI module that i wrote in Verilog. After i completed the signal integrity verifications and modifications, i had to start working with my designs inside the FPGA.i had written and simulated a three-part core that included the SPI module, an Ethernet Initialization module and a Test Packet module. All three are connected through an "upper-level" module which

Senior Project: Ethernet Board Verification Pt2

2010-01-24T11:37:00.000-08:00

Well, on the 22nd i started working with signal integrity verification between the Nexys2 and my Ethernet board. "Why would i do this", you may ask? Well, if the reader has ever done any extensive EE designs, it is known that there are "gremlins" or intermittent failures that occur in digital systems. For instance: when RAM is corrupted or data sent between boards is NOT received the same as it

Senior Project: Ethernet Board Verification Pt1

2010-01-21T19:36:00.000-08:00

Before i start hammering heavily into the HDL and loading onto the FPGA, it is a good idea to confirm the correct operation of some of the core cornerstones of the board.So, i busted out the good old 16500 with the 16531A Oscilloscope Board and started probing.i began with verifying the clock signal was operating properly from the oscillation chip. If you look at the picture, the period is 40ns

Barnes and Noble's Nook: A Review

2010-01-12T13:48:00.000-08:00

So i have been riding the eReader wave for the last several months, anticipating CES and the speculated release of several new eReaders. Including Plastic Logic's Que and Hearst's Skiff eReader (that i thought i read was actually developed by Que).Anyway i, like most normal eReader enthusiasts have been concerned with price. Let me start there: CES was disappointing for me on this aspect. Seeing

How to Install Chrome on Ubuntu

2009-12-02T08:47:00.000-08:00

i followed a tutorial from ubuntugeek.com, which i will echo here. The location of the original tutorial is found here.To install Chrome, one has to edit the Synaptic Package Source list. If you are running Ubuntu Netbook Remix 9.10 like i am:-Click the Ubuntu icon, top left corner.-Click the "System" tab.-Scroll down to the Administration section and click "Software Sources".-Select the "Other

Thoughts on x86 Architecture

2009-11-16T12:25:00.000-08:00

Intel is a pretty cool company, i'll just lay that right out there. As many know, i am studying the AT&T syntax of Assembly on the x86 processor. i ran across a very fascinating "set" of instructions for swapping data that i find very useful.The instruction i am playing with right now is labeled xchg, and what it does is flip the data values between two registers or between a register and a

eeePC 1000 Wireless Antenna Hack

2009-10-25T16:00:00.000-07:00

i was intrigued by the possibility of adding a little bit more gain to my wireless card that is in my eeePC. For those of you who own on of these computers, the supplies you'll need are:-Flat Head Screwdriver-Philips Head Screwdriver-U.Fl to SMA Cable (at least 20-25cm, i got mine off of Ebay for about $3)-SMA Antenna with a gain of your choice (i had one laying around from an internal PCI

Ubuntu Netbook Remix Control Applet

2009-10-12T12:50:00.000-07:00

Are you using UNR on your Asus Netbook? Have you been trying to install an applet that controls the hotkeys, Wifi, Card Reader, Bluetooth, and fan speed? Have you installed both the eee-applet and eee-control from Synaptic just to be sadly disappointed by the applet's operation (or lack thereof)? Well, i have been using an excellent applet that i will call the "REAL" eee-control applet. It is

PLL Notes, pt 1

2009-10-06T13:24:00.000-07:00

i have been reading a fascinating book entitled Phase-Locked Loops Design, Simulation, and Applications written by Roland E. Best, as i am chasing the design concepts behind QAM modulators and demodulators. Well, i have to start with phase basics and what better way than with PLLs?The PLL is, in a nutshell either a digital or analog control system. The PLL contains four major blocks as referenced

Assembly Environments

2009-10-05T10:08:00.000-07:00

i had set out a few weeks ago to find a Linux alternative to the MASM assembler as i wanted to be fundamentally based in NIX. Well, i finally found a nice eBook that gives an excellent process for assembling/linking as well as debugging assembly programs written for linux.i am using the GNU Assembler, which utilizes the Motorola Assembly syntax with a switch option to use the Intel syntax. For me

Ubuntu's New Look

2009-10-01T13:41:00.000-07:00

So, if you are an Ubuntu junkie like me you may have noticed that they have come out with a "Netbook Version" of the OS. Here's some pics of the new look. The eeePC has everything functionally working with this OS. It only takes like 30 minutes to install.The UNR version also allows for the "Standard Desktop" view if you get sick of the category view. One bug i've already found is that when one

One Out of Many....

2009-09-24T06:55:00.000-07:00

i am working at my desk, with my Windows machine on and i need to send an email. One problem: my company uses Lotus Notes. Why do they use Notes? It's like running a second OS on top of my OS. It doesn't reconnect to the server automatically when the program is closed and reopened, so i have to reboot.Second problem: this machine is running Windows. Why oh why do people STILL use Windows?!?

AM Modulator

2009-09-16T08:03:00.000-07:00

Remember that i had posted about a year ago that i was trying to figure out how to design an AM modulator? Remember that the closest that i got was the concept from a TI app note that utilized an opto-coupler to vary the gain of the carrier wave? Remember that this design wasn't very stable?Well, finally after a year of gaining experience with design, opamps, and concepts...as well as studying

Thoughts on Processor Architecture

2009-09-13T12:51:00.001-07:00

From studying the x86 through assembly, i have determined some of the processors architecture from a low-level standpoint. The 8086 is known to NOT support floating point operations. Although i conceptually understood what a floating point operation was, i never really followed what the implications were at the low level until i have studied the instruction set of this processor.Let me bring this

Quirks in Assembly

2009-08-26T07:56:00.001-07:00

i am taking a microprocessors class this semester, and am thus studying Assembly. i have been wading through piles of documentation to find what the language itself is constructed of.Here is what i have determined thus far:1) The instructions of the language are highly determinant on the processor that is being targeted. Meaning the set of assembly instructions is different for an Intel 80386

Review of 8086 Architecture, Assembly Language

2009-08-21T12:52:00.000-07:00

i am taking a Microprocessors class this fall. Which if it was up to the instructor would only be another programming language class. Wrong! The study of a Microprocessor should be based at the register level, similar to a higher abstraction level of FPGA design.With that said, often Assembly Programmers for embedded environments often state that "assembly is faster and more efficient than C or

Solder Examples

2009-08-14T10:11:00.000-07:00

i had a good friend ask me for some advice on soldering wire to some pre-filled holes on a board. The solder is very difficult to wick out of the holes, so he wanted to figure out a way to get these wires down.Having more than my fair share of industry and aerospace soldering experience, i figured the best way to solder these wires down wasn't to "get them through" the solder already in the holes

Prototype SPI Board

2009-08-01T23:01:00.000-07:00

The board has arrived and i have completed the assembly of all the parts. As mentioned before, there was a glitch with the PMOD port, and i found out today after trying to solder down the !RESET switch that the layout that i used was a little small. Lesson learned: always VERIFY a layout that someone supplies you with, don't just assume it is correct.Check out the pics in the sidebar from my

Board Work

2009-07-29T08:28:00.000-07:00

It's been a while, that's due to an extremely obnoxious general-ed teacher that decided to post all of the course's assignments in the last two weeks of class. Yes, his supervisor will be hearing from me.Onto other things: i received my board about a week ago and fully assembled it. There was only one glitch in the layout which is fixable for the prototype phase: Digilent decided to layout their

Key Expansion part 2

2009-07-10T21:41:00.000-07:00

If you hadn't noticed, i LOVE encryption. Coolest stuff i have ever worked with. For my senior design i am all about implementing it into my design in a fairly awesome way. Also, since taking my verilog course this last semester, what better way to do that than through hardware acceleration: by rolling my own core!If you read the post directly before this one, you will notice my key expansion

AES Key Expansion

2009-07-09T07:25:00.001-07:00

So, i have been working heavily over the past week and a half to actually dive into my AES core and write Verilog that is synthesizable. i had originally worked a design that was highly hierarchical in nature that was the ENTIRE AddRndKey operation, which included the infamous Key Expansion algorithm. To do this in logic is no easy task!Thus i had nearly designed this fourth of four iteration

9V to 3.3V DC-DC Converter Update

2009-06-26T20:01:00.000-07:00

Ok, after hacking my design a little bit i found some interesting generic facts that i can place on transformers.1) If one needs more current out of the secondary windings, then increase the number of windings of the transformer. Do NOT change the winding ratio, as that gives the designer the voltage output.2) If one needs more current out of the secondary windings, then one must SATURATE the

Demistifying Magnetics

2009-06-18T08:55:00.000-07:00

Ok, so i've been number crunching for about a week now trying to figure out how to practically apply the mathematics of e/m (electricity and magnetism). For those of you that have taken a calculus-based Physics 2 course, where you spend the ENTIRE semester cover things such as permeability(μ), electrical potential (E), magnetic potential (B) and all the craziness that goes along with it (field

Ubuntu Password Recovery

2009-06-17T08:09:00.000-07:00

Ok, if you are a bonehead every once in a while like i am, you'll change your password for security reasons and one of a few things will occur:1) You never mentally documented your password.2) You remember your password then go on vacation for a year and come back only remembering your original password.3) You change your password and type something completely different than WHAT you were

Coming soon.....

2009-06-16T13:01:00.001-07:00

i wanted to try this: open an online store where people can purchase customized electronics for whatever they want. i will still go open source with the concept, but if you want me to build it for you (board layout, schematics, code etc) then you can buy a completed product.i am working an idea for a web layout and will preview that soon.Stay tuned.....

DC to DC Converter

2009-06-13T14:11:00.001-07:00

My latest project is to build a DC-DC converter so i can run my FPGA board off of a 9v battery. i was turned on to an article in Nuts and Volts located here. Great article that gives all the inductive math, Farraday's Law, and wraps it all into a comprehensive guide on how to "roll your own core."Well, after looking over the article (which is GREAT in and of itself) i found that i didn't have