New Blog

i have moved my blog to the following location:

codingcipher.wordpress.com

Please join me there for future blog posts!

SystemC

IEEE1666, if you want to look at it up close and personal here. For those of us designing FPGAs, this could be a great tool for system design and modeling. i would call this language still in its infancy due to the overall adoption by the design market. i could only find one tool made by Cadence that claims to support the language for synthesizable constructs.

SystemC is a superset of libraries of the C++ language. The language seems to center around the building and reusing of models of larger, more top-level functions/blocks. So, instead of designing at a gate level (which is where most FPGA designers code with Verilog and VHDL), System C is used to design at a system level with this OO language.

Fight the Compiler
i run Mac, many of you know, and i spent this last weekend trying to compile the SystemC libraries with no success. i was using gcc 4.5 but many of the "supported" compilations on the OSCI website state that gcc 3.3 was used. Hmm, ok. i kept digging in the bowels of Google and found a link for modifying the configure script here and things were looking promising, getting all through the ./configure command but failing in make.

i went back to verify that the MacPorts gcc_select was still pointing to the MacPorts gcc 4.5 i had installed and realized there was an issue there as well. i was still using the built-in Apple gcc (4.0.2) which i have found to have issues before. So, tonight i'll play with remapping gcc to the MacPorts version to get this compiled.

Advantage of System C
One great thing if i changed over to using System C for designing FPGAs is that it would be much easier and more stream lined to test a system's hardware models alongside the software (both could possibly be written in C++). This would make simulation much easier from a tool-usage standpoint, instead of designers having to stumble through heavy tool sets like Xilinx's EDK/ Platform Studio to design and simulate a system. These tools are getting better but lack a lot of abstraction needed for advanced system design.

i can hear the pitch forks being sharpened and the torches being lit now.

Will abstraction cause issues? Yes. However will the abstraction allow for more advanced system design that other tools that still provide designers with all of the low-level details can not? i believe so. Too many times i've seen FPGA designs get lost seeing "the forrest for the trees", while focusing on the color of bark.

UPDATE: i guess i didn't tell you where to download the source o_O opps! So, first go here and register (yes you have to).
Next, click on the "Downloads" tab.
Next, click on the link "Current OSCI standards" or click here.
Under "Download Standards" and the sub section "Current Standards" click the tar.gz file link for the "SystemC x.x" that has the Details description "Core SystemC Language".

There is a README file and an INSTALL file in the archive root, however if you are trying to compile for OSX, i'd start with this page to get a feel for how to edit the configure script. There is a way to "regenerate" the configure script using a makefile in the ./config directory but i haven't played with that much. It will eventually install the same way any source would, with ./configure, make, make install.

Also note: if you don't want to compile the latest source on your own for OSX, Jeff has already done that for an earlier version of SystemC here. However, this image requires one to use Xcode tools (from what i can tell).

Activities

i just looked at my blog and realized it's been, over a month and a half?!?! Wow, time flies.

If you didn't know, i had a little boy on June 23 and have been busy ever since. Duh, right?

i have been focusing on learning JavaScript to add some "playground" stuff to my pet website here. i thought it'd be fun to add a client-side syntax highlighter for the RTL/TB code pages. i've also been remapping some pages to make the site more succinct. Since this is a pet website, i expect it to take 10,000 years to actually finish, if you know what i mean.

i have been writing that 3DES core (slowly) in both VHDL and Verilog just for kicks. i am finished up with most of the major components and now just need to write the top-level state machine. DES has a much lower complexity than AES to write into hardware.

Stay tuned, it won't be nearly as long to the next post, i promise!

FPGA Development Environment

Many of you know that i run most of my FPGA development on my Mac. i have compiled tools and utilized the tool base from MacPorts for almost all of the utilities i require for my work. However there are some tools that i cannot run on Mac, so my alternative is to just run a virtual machine of my favorite Linux OS.

Well, i originally started my Linux journey with Ubuntu and it is a very friendly and first-time-learning-supportive OS. However my interest in a Linux OS is tied directly to several factors:

• How Linux pure the OS is.

Yes, i'm a freak, but the more a Linux OS functions and looks like Windows, the less i want to use it. i use Linux for a reason: because it's Linux. End of story.

• How functional the package management structure is.

Personal experience: all of the Linux OSes i have used, have had the dependencies of many different installed packages broken at some point or another during normal upgrading. Believe me if you want. i guess i just don't get that automated stuff.
It always freaks me out how easy it is to actually upgrade packages without actually knowing why they are being upgraded. Again, me not really understanding that whole "automated" thing.

• One word: bloatware.

Maybe this falls back onto the first point i made, the bloatware that so many Linux OSes have installed as a "package of base packages", so to speak. Being the engineer i am, i just don't want the extra crap unless i want to install it myself.

• Resource utilization.

Along with the bloatware and many "default" packages that run in today's Linux OSes, memory and processor space and timeslots become somewhat scarce. i want to develop FPGAs, not watch my computer screech to a halt under the thousands of threads that are running on a default system. i also don't want to have to go through the system uninstalling all those "default" packages just to free up my OS. That's what Windows has you do.

There's only one Linux OS for me: Slackware.

i've made the switch over and installed the XFCE environment and even with KiCAD, conky and Chrome running the OS only uses 200MB of RAM. Sweet. Not only that, but the packages installed are only the packages i want. Learning the SlackBuild environment takes time but after learning it, one learns dependencies of the packages and more of how software is actually built. Slackware++ in my mind.

Ok, enough ranting.

VHDL and some Quirks with GHDL

Those of you familiar with VHDL FPGA design are probably aware of the Open Source tool GHDL. It is quite robust and the author, Tristan has done a *great* job with many of the features it has. i just thought i'd catalog a few quirky aspects of the tool that i have noticed while using it. Call it some "gotchas" that i have fallen into.

You have to give me some slack, i learned HDL coding from Verilog and then moved to VHDL. Yes, thats pretty much one of the steepest learning curves a digital engineer could take.

"Quirk" 1
When writing a combinatorial process, if the sensitivity list is empty:

reg_proc:
process -- opps
begin
...
end

GHDL doesn't complain...at all. Like maybe the proverbial "Hey, there might be an infinite loop in this process because you didn't tell me what to pay attention to, dumb ass!" This was without any wait keywords in the block anywhere. As a note: Synplify/QuestaSim will send a warning when there are no signals in the sensitivity list, not to compare a multi-thousand dollar tool to an Open Source tool, but still.

"Quirk" 2
GHDL doesn't "normally" support the std_logic_arith and std_logic_unsigned libraries due to the fact that they are not "legitimate" libraries of the IEEE. Didn't know that until i found this little quirk. So, to force GHDL to use them, GHDL must have a switch specified during analysis and during elaboration:

$ ghdl -a --ieee=synopsys design.vhd
$ ghdl -e --ieee=synopsys design

The gurus over at GHDL give you a description of the three other libraries to use here.
After using GHDL and becoming really familiar with it, i guess the library utilization and limitation makes sense. If you are designing a tool to use IEEE libraries, the purest method is to only support "legitimate" IEEE libraries.

i found a nice descriptive index of the different libraries here and for kicks the GNU Free Document License.

EDIT:
"Quirk" 3
For whatever reason, GHDL does not like the "—" character (that's a long-dash that Word processors place as a replacement for the double dash "--"). Even if this character is in a comment, GHDL will still choke on it. Hence another reason to never use a word processor to write code.

None of these quirks gives me a reason to not use the tool, in many respects it can easily hold it's own against the big tools and works great with gtkWave. i use it when all Synplify Pro licenses are used or i don't want to write out the massive command to use Synplify Pro and it works awesome! :)

What is going on?

Been a while, been busy with work and more work. i took a contracting job on the side working a small CPLD redesign. Can't share specifics of course :)

Anyway, what has been going on? Well, i recently upgraded my professional website server to use the latest Linux 2.6.39 kernel and i have to say i think i can see response time improvements even in the page loading. See for yourself.

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EDIT: My server is down temporarily as I am in between ISPs due to the failure of my last router from actually working properly and the ISPs inability to send me a new one.
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EDIT (06/03/11): My server is back up and functioning properly. Check it out with the link above!
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i haven't given up on the NES Emulator or my Softcore projects, they just need to go on hold while i work this contract job for a few weeks.

i also think i will start dabbling with some PHP as it may add a fun effect to my website as i think i'll start throwing up some fun linux-based desktop wallpapers. i have found some that are kind of cool just through Google Images, however they just never quite tickle my fancy. So my solution: make my own....with GIMP of course.

Stay tuned for more updates on my embedded projects!

Mac OSX Time Machine drives on FreeNAS Server, Part 3

This post is a continuation from Part 1 and Part 2 where i demonstrate how to setup the hardware and setup FreeNAS for hosting a Time Machine drive over the network.

Now we will finally setup the Mac to connect automagically to the FreeNAS server. The way this setup works, is every time the Mac is on the same network as the FreeNAS server with the Time Machine share, Time Machine will perform it's normal backup schedule. What is this schedule, you may ask? Well, let's take a look at the Time Machine app window.

Hourly backups for the last 24hours, daily backups for the last week and weekly backups for any dates older than that. Here's where the nature of Time Machine becomes apparent: the app takes care of removing old hourly backups and thins out the oldest backups as the drive fills up. The user (you) never has to worry about this! Let's say you are writing a complicated memory manager in C, for the past 9 hours (need beer!). Then, out of nowhere, WHAM! The drive on your Mac goes down. If you are on your network and have Time Machine setup the way i show you here, the worst case scenario is that you have lost 59 minutes and 59 seconds worth of work. A pain, yes, but when was the last time you manually plugged in your Time Machine external drive BEFORE you setup a FreeNAS server like i have shown you in these tutorials? :)

Ok, as with many other tutorials, the first thing we need to do is tell Time Machine to allow network "unsopported" (why does Apple refer to them like this?) drives to be used for Time Machine backups. Open up Terminal and enter the following command:

defaults write com.apple.systempreferences TMShowUnsupportedNetworkVolumes 1

Thanks to Jonathan Brown's post for that bit of information. If you DON'T run this command, Time Machine will NOT show the network share drive in the list of drives available!!!

Ok, next, with the FreeNAS server running, open a Finder window and press COMMAND + k which will open the Connect to Server window. Enter the IP address, followed by slash and the name of the share you created that mounts in the /mnt directory on the FreeNAS server. Note: click the plus (+) symbol next to the Server Address: field, which adds this server to the list of favorites on the Mac. This will tell the Mac to automatically reconnect to the server (which we want) when it is available (when the Mac is on the same network as the FreeNAS server).

It will ask you for the credentials to access this share. This is the same username and password you assigned to the drive/share on the FreeNAS server Part 2, Step 7 and Step 12. This is NOT the uname/password of the account on your Mac (unless they were made the same). Make sure to allow the Mac to store this password on the keyring so that you don't have to keep entering the username and password.

Finally, we may now open Time Machine, make sure the ON/OFF switch is set to ON. Click the Select Disk button, the drive share should be listed. Select the disk and select Start Backing Up.
Note: Time Machine has to create the sparsebundle file and generate the first initial backup, which should be huge (mine was about 100GB). For this, you may want to plug your Mac into an ethernet port on your router and let it run overnight. If it "appears" to get stuck on Initializing, that is the part where it is creating the sparsebundle file. Don't panic! This will take a while!

You're done! You are now automatically backing up your Mac to a FreeNAS disk!